@inproceedings{e6645889487a4af3b7fb794987c70260,
title = "Virtual channel router architecture for Network on Chip with adaptive inter-port buffers sharing",
abstract = "Network on chip (NoC) is the new efficient interconnection structure of nowadays complex system on chips. The performance of NoC in terms of latency, throughput and power consumption should be optimized. Since buffers consume around 60\% area and 30\% power of the whole router, the relationship between network performance and memory resources has to be considered. In this paper, we propose a new router architecture enabling an adaptive virtual channels sharing among different input ports. This router solves the problem of virtual channels underutilization; it improves the area and power consumption performance without affecting the latency.",
keywords = "Buffers sharing, Mesh, Network on chip, Virtual channel",
author = "Manel Langar and Riah Bourguiba and Jaouhar Mouine",
note = "Publisher Copyright: {\textcopyright} 2016 IEEE.; 13th International Multi-Conference on Systems, Signals and Devices, SSD 2016 ; Conference date: 21-03-2016 Through 24-03-2016",
year = "2016",
month = may,
day = "18",
doi = "10.1109/SSD.2016.7473771",
language = "English",
series = "13th International Multi-Conference on Systems, Signals and Devices, SSD 2016",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "691--694",
booktitle = "13th International Multi-Conference on Systems, Signals and Devices, SSD 2016",
address = "United States",
}