Implementation of CPA analysis against AES design on FPGA

Noura Benhadjyoussef, Hassen Mestiri, Mohsen Machhout, Rached Tourki

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

23 Scopus citations

Abstract

Physical implementations of cryptographic algorithms may let relatively side channel information. By analyzing this information leakage, the confidential data, like the cryptographic keys, can be revealed. The correlation power analysis(CPA) is a well-known attack of the cryptographic device. This paper conduces a successful CPA of the Advanced Encryption Standard AES implemented on the Xilinx FPGA with the Side-channel Attack Standard Evaluation Board (SASEBO). The experimental results show that the choice of the power model and the number of power traces can further improve the performance of CPA attack in extracting the correct key.

Original languageEnglish
Title of host publication2012 International Conference on Communications and Information Technology, ICCIT 2012
Pages124-128
Number of pages5
DOIs
StatePublished - 2012
Externally publishedYes
Event2012 International Conference on Communications and Information Technology, ICCIT 2012 - Hammamet, Tunisia
Duration: 26 Jun 201228 Jun 2012

Publication series

NameInternational Conference on Communications and Information Technology - Proceedings
ISSN (Print)1792-4316

Conference

Conference2012 International Conference on Communications and Information Technology, ICCIT 2012
Country/TerritoryTunisia
CityHammamet
Period26/06/1228/06/12

Keywords

  • Advanced Encryption Standard (AES)
  • CPA
  • Hamming distance model
  • power analysis
  • side channel

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