High throughput pipelined hardware implementation of the KECCAK hash function

Hassen Mestiri, Fatma Kahri, Mouna Bedoui, Belgacem Bouallegue, Mohsen Machhout

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

28 Scopus citations

Abstract

The cryptographic hash algorithm has been developed by designers with the goal to enhance its performances in terms of frequency, throughput, power consumption and area. The cryptographic hash algorithm is implemented in many embedded systems to ensure security. It is become the default choice to ensure the information integrity in numerous applications. In this paper, we propose a pipelined architecture of the new algorithm SHA-3 (KECCAK). In addition, the proposed KECCAK architecture has been implemented on Xilinx FPGA platform (Virtex-5). Its frequency, efficiency, throughput and area have been compared and discussed. The FPGA implementation results show that the proposed architecture achieves good performance in terms of frequency and throughput.

Original languageEnglish
Title of host publication2016 International Symposium on Signal, Image, Video and Communications, ISIVC 2016
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages282-286
Number of pages5
ISBN (Electronic)9781509036110
DOIs
StatePublished - 6 Apr 2017
Externally publishedYes
Event2016 International Symposium on Signal, Image, Video and Communications, ISIVC 2016 - Tunis, Tunisia
Duration: 21 Nov 201623 Nov 2016

Publication series

Name2016 International Symposium on Signal, Image, Video and Communications, ISIVC 2016

Conference

Conference2016 International Symposium on Signal, Image, Video and Communications, ISIVC 2016
Country/TerritoryTunisia
CityTunis
Period21/11/1623/11/16

Keywords

  • FPGA
  • Hash Functions
  • Pipeline Architecture
  • Security
  • SHA-3 KECCAK

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