@inproceedings{eece4c89221b4f84ba39fdb59aedfd8d,
title = "Fault attacks resistant AES hardware implementation",
abstract = "The protection of the symmetric cryptographic algorithm, specially the Advanced Encryption Standard (AES), against fault injection attacks is very inportant to guarantee the security of transmitted data. In this paper, we proposed a new fault detection scheme based information redundancy for the AES. We analysis the detection scheme robustness against the fault injection attacks. The simulation fault attacks results prove that the fault coverage reaches 71.43\%. In addition, the original and the protected AES hardware implementation have been implemented on the Xilinx Virtex-5 FPGA. We confirm that the protected AES is very effective while keeping the frequency overhead very low.",
keywords = "AES, Cryptography, Embedded systems, Fault attacks, Fault detection",
author = "Hassen Mestiri and Noura Benhadjyoussef and Mohsen Machhout",
note = "Publisher Copyright: {\textcopyright} 2019 IEEE.; 2019 IEEE International Conference on Design and Test of Integrated Micro and Nano-Systems, DTS 2019 ; Conference date: 28-04-2019 Through 01-05-2019",
year = "2019",
month = apr,
doi = "10.1109/DTSS.2019.8914979",
language = "English",
series = "IEEE International Conference on Design and Test of Integrated Micro and Nano-Systems, DTS 2019",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "IEEE International Conference on Design and Test of Integrated Micro and Nano-Systems, DTS 2019",
address = "United States",
}