@inproceedings{414b0792b5ca40ebbf06cf6080c2a0bc,
title = "A new programmable ALU architecture for hard-core processor",
abstract = "Hard-core processors are known to be a very performed in terms of operation frequency, area and power consumption. However, they have fixed design so that, they cannot be reused for different applications. In this paper we propose a new ALU (Arithmetic and Logic Unit) architecture that allows to these processors to be generic propose without losing hard-core performances.",
keywords = "ALU, ASIP, Hard-core, LUT, Processor, Programmable logic, RISC",
author = "Hajer Najjar and Riad Bourguiba and Jaouhar Mouine",
note = "Publisher Copyright: {\textcopyright} 2016 IEEE.; 13th International Multi-Conference on Systems, Signals and Devices, SSD 2016 ; Conference date: 21-03-2016 Through 24-03-2016",
year = "2016",
month = may,
day = "18",
doi = "10.1109/SSD.2016.7473751",
language = "English",
series = "13th International Multi-Conference on Systems, Signals and Devices, SSD 2016",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "567--570",
booktitle = "13th International Multi-Conference on Systems, Signals and Devices, SSD 2016",
address = "United States",
}