A High-Efficiency Isolated PFC AC-DC Topology With Reduced Number of Semiconductor Devices

Obaid Aldosari; Luciano Andres Garcia Rodriguez; German G. Oggier; Juan Carlos Balda

doi:10.1109/JESTPE.2021.3060193

A High-Efficiency Isolated PFC AC-DC Topology With Reduced Number of Semiconductor Devices

Obaid Aldosari, Luciano Andres Garcia Rodriguez, German G. Oggier, Juan Carlos Balda

Electrical Engineering

Research output: Contribution to journal › Article › peer-review

8 Scopus citations

Abstract

A new three-level isolated ac-dc power factor correction (PFC) topology with a minimum number of semiconductor devices is the focus of this article. This topology provides a high input power factor (PF), soft-switching, and higher efficiency than existing isolated ac-dc converters. Furthermore, the proposed circuit has lower voltage rating requirements for the secondary side devices, which leads to a lower total cost and minimizes total converter losses. This article presents a theoretical analysis describing the complete characterization of this new topology, and experimental results on a 1-kW prototype showing high PF and efficiency throughout the operating range.

Original language	English
Pages (from-to)	3631-3642
Number of pages	12
Journal	IEEE Journal of Emerging and Selected Topics in Power Electronics
Volume	10
Issue number	4
DOIs	https://doi.org/10.1109/JESTPE.2021.3060193
State	Published - 1 Aug 2022

Keywords

AC-DC converters
conduction losses
power factor correction (PFC)
soft-switching
solid-state transformer (SST)

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

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10.1109/JESTPE.2021.3060193

Cite this

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title = "A High-Efficiency Isolated PFC AC-DC Topology With Reduced Number of Semiconductor Devices",

abstract = "A new three-level isolated ac-dc power factor correction (PFC) topology with a minimum number of semiconductor devices is the focus of this article. This topology provides a high input power factor (PF), soft-switching, and higher efficiency than existing isolated ac-dc converters. Furthermore, the proposed circuit has lower voltage rating requirements for the secondary side devices, which leads to a lower total cost and minimizes total converter losses. This article presents a theoretical analysis describing the complete characterization of this new topology, and experimental results on a 1-kW prototype showing high PF and efficiency throughout the operating range.",

keywords = "AC-DC converters, conduction losses, power factor correction (PFC), soft-switching, solid-state transformer (SST)",

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AU - Balda, Juan Carlos

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AB - A new three-level isolated ac-dc power factor correction (PFC) topology with a minimum number of semiconductor devices is the focus of this article. This topology provides a high input power factor (PF), soft-switching, and higher efficiency than existing isolated ac-dc converters. Furthermore, the proposed circuit has lower voltage rating requirements for the secondary side devices, which leads to a lower total cost and minimizes total converter losses. This article presents a theoretical analysis describing the complete characterization of this new topology, and experimental results on a 1-kW prototype showing high PF and efficiency throughout the operating range.

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A High-Efficiency Isolated PFC AC-DC Topology With Reduced Number of Semiconductor Devices

Abstract

Keywords

UN SDGs

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