TY - JOUR
T1 - Three-Dimensional Space Vector Modulation Strategy for Capacitor Balancing in Split Inductor Neutral-Point Clamped Multilevel Inverters
AU - Ramasamy, Palanisamy
AU - Krishnasamy, Vijayakumar
AU - Sathik, Mohamed Ali Jagabar
AU - Ali, Ziad M.
AU - Aleem, Shady H.E.Abdel
N1 - Publisher Copyright:
© 2018 World Scientific Publishing Company.
PY - 2018/12/31
Y1 - 2018/12/31
N2 - Capacitor imbalance is one of the major drawbacks of a neutral-point clamped multilevel inverter (NPC-MLI). The capacitor imbalance rises due to the nonuniform switching, nonideal DC link capacitors, improper commutation, and various asymmetrical phase currents in switching states. The imbalance can be minimized by using proper switching using a redundancy switching method and avoiding the usage of medium vectors. The computational cost of this system is to be decided by the level of the inverter system. This paper presents a comprehensive three-dimensional space vector modulation (3D-SVM) strategy to eliminate the imbalance in the DC link capacitor voltage, which is across the applied input DC source. The technique is easy to implement without using any trigonometric functions, lookup tables, or angle determinations. This proposed scheme has been verified using MATLAB Simulink and authenticated using field-programmable gate array (FPGA) controller.
AB - Capacitor imbalance is one of the major drawbacks of a neutral-point clamped multilevel inverter (NPC-MLI). The capacitor imbalance rises due to the nonuniform switching, nonideal DC link capacitors, improper commutation, and various asymmetrical phase currents in switching states. The imbalance can be minimized by using proper switching using a redundancy switching method and avoiding the usage of medium vectors. The computational cost of this system is to be decided by the level of the inverter system. This paper presents a comprehensive three-dimensional space vector modulation (3D-SVM) strategy to eliminate the imbalance in the DC link capacitor voltage, which is across the applied input DC source. The technique is easy to implement without using any trigonometric functions, lookup tables, or angle determinations. This proposed scheme has been verified using MATLAB Simulink and authenticated using field-programmable gate array (FPGA) controller.
KW - capacitor balancing
KW - DC link capacitor
KW - field-programmable gate array (FPGA)
KW - Neutral-point clamped multilevel inverter (NPC-MLI)
KW - three-dimensional space vector modulation (3D-SVM)
UR - http://www.scopus.com/inward/record.url?scp=85045322454&partnerID=8YFLogxK
U2 - 10.1142/S0218126618502328
DO - 10.1142/S0218126618502328
M3 - Article
AN - SCOPUS:85045322454
SN - 0218-1266
VL - 27
JO - Journal of Circuits, Systems and Computers
JF - Journal of Circuits, Systems and Computers
IS - 14
M1 - 1850232
ER -