Novel Capacitive MEMS Logic Gates for Logic Circuits and Systems

A novel design based on capacitors dedicated to the low power logic circuits and systems is presented in this work. This design is based on MEMS architectures and is intended to achieve binary logic functions for a better efficiency that by using solid-state transistors. The excessive feature of the proposed design is the use of only a single bit MEMS switch instead of many CMOS transistors in order to implement a logic gate, whether it is fundamental logic gate, AND, OR, or universal logic gates XOR, NAND, NOR. The proposed design consists of two symmetric capacitors. The capacitors are coupled mechanically but isolated electrically. A gap-closing input capacitor controls a gap-closing capacitor at the output. A compact and accurate electromechanical model has been developed. We demonstrate using electromechanical simulations the ability of the MEMS design for binary logic functions.