New scalable digit-serial inverter over GF(2m) for embedded applications

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Abstract

This paper presents new scalable digit-serial inverter architecture with low circuit complexity to perform inversion operation in GF(2m) based on a previously modified extended Euclidean algorithm. The architecture size can be modulated to be suitable for fixed size crypto processors used in embedded applications. Implementation results of the proposed design and previously reported efficient designs show that the proposed scalable structure achieves a significant reduction in area ranging from 83.0% to 88.3% and also achieves a significant saving in energy ranging from 75.0% to 85.0% over them, but it has lower throughput compared to them.

Original languageEnglish
Title of host publication2016 International Conference on Advances in Electrical, Electronic and Systems Engineering, ICAEES 2016
EditorsRosdiadee Nordin, Mohd Fais Mansor, Mahamod Ismail
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages531-534
Number of pages4
ISBN (Electronic)9781509028894
DOIs
StatePublished - 2016
Event2016 International Conference on Advances in Electrical, Electronic and Systems Engineering, ICAEES 2016 - Putrajaya, Malaysia
Duration: 14 Nov 201616 Nov 2016

Publication series

Name2016 International Conference on Advances in Electrical, Electronic and Systems Engineering, ICAEES 2016

Conference

Conference2016 International Conference on Advances in Electrical, Electronic and Systems Engineering, ICAEES 2016
Country/TerritoryMalaysia
CityPutrajaya
Period14/11/1616/11/16

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