Implementation of High Speed and Low Area Extended Euclidean Inversion over Ternary Fields

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Abstract

Hardware implementation of the extended Euclidean algorithm (EEA) over ternary field introduces many challenges, include degree evaluations during and after each iteration of the algorithm. This paper presents a novel realization of the traditional EEA over ternary fields in a concurrent manner, resolving the issues stated above by using a former systolic architectural approach. Polynomial division and multiplication in GF(3m) are performed concurrently. Accordingly, an EEA-based ternary inverter is built. Then, the complexity of the proposed inverter is analyzed in comparison with efficient designs in the literature, concluding that our design has the lowest area-time complexity.

Original languageEnglish
Title of host publication2019 IEEE Canadian Conference of Electrical and Computer Engineering, CCECE 2019
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781728103198
DOIs
StatePublished - May 2019
Event2019 IEEE Canadian Conference of Electrical and Computer Engineering, CCECE 2019 - Edmonton, Canada
Duration: 5 May 20198 May 2019

Publication series

Name2019 IEEE Canadian Conference of Electrical and Computer Engineering, CCECE 2019

Conference

Conference2019 IEEE Canadian Conference of Electrical and Computer Engineering, CCECE 2019
Country/TerritoryCanada
CityEdmonton
Period5/05/198/05/19

Keywords

  • Concurrent Extended Euclidean Algorithm (EEA)
  • Systolic Array
  • Ternary Fields Inversion

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