@inproceedings{8f6b9dfa4cce4552979654f5d6b12774,
title = "Implementation of a baseline RISC for the realization of a dynamically reconfigurable processor",
abstract = "RISC processors are widely used because of their multiple advantages. In Fact, they are based on a simple instruction set so that they increase the speed of the processor and reduce its energy consumption. In this paper, a basic RISC architecture processor is presented. This architecture will be developed later to converge to a new one with runtime reconfiguration.",
keywords = "DLX, pipeline, Processor, RISC, runtime reconfiguration",
author = "Hajer Najjar and Riad Bourguiba and Jaouhar Mounie",
note = "Publisher Copyright: {\textcopyright} 2015 IEEE.; 12th International Multi-Conference on Systems, Signals and Devices, SSD 2015 ; Conference date: 16-03-2015 Through 19-03-2015",
year = "2015",
month = dec,
day = "4",
doi = "10.1109/SSD.2015.7348101",
language = "English",
series = "12th International Multi-Conference on Systems, Signals and Devices, SSD 2015",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "12th International Multi-Conference on Systems, Signals and Devices, SSD 2015",
address = "United States",
}