High-Speed Hardware Architecture Based on Error Detection for KECCAK

Computer Science

• Hardware Architecture 100%
• Error Detection 100%
• Side Channel Attack 100%
• Field Programmable Gate Array 50%
• Fault Detection 50%
• Computer Hardware 50%
• Experimental Result 25%
• Hash Function 25%
• Scrambling 25%
• Physical Attack 25%
• Confidential Data 25%
• Transmitted Data 25%
• Cryptographic System 25%
• Fault Detection Scheme 25%
• Fault Injection 25%