Elucidating the electrical performance and thermal stability in14-nm FinFETs CMOS technology

Nanoscale device self-heating effects have become an important issue in simulation and fabrication of Bulk and SOI FinFET transistors. In this work, we have investigated a mathematical methodology to capture electrical performance and thermal stability in a 14-nm Bulk and SOI FinFET components. Finite Element method have been used to bring forth our numerical results. We have compared the electrical part of our mathematical model with experimental data obtained by INTEL and HP laboratories and with TCAD simulators. It is revealed that for both SOI and Bulk FinFETs, the I–V characteristics obtained by our model is very close to that obtained by INTEL and HP experimental works. Our results also show a good agreement between the thermal parts of the proposed model with TCAD simulator. On the other hand, we have demonstrated that after 100 ​ns, the 14 ​nm Bulk FinFET supports better the temperature distribution than the 14 ​nm SOI FinFET.