TY - GEN
T1 - A reliable fault detection scheme for the AES hardware implementation
AU - Bedoui, Mouna
AU - Mestiri, Hassen
AU - Bouallegue, Belgacem
AU - Machhout, Mohsen
N1 - Publisher Copyright:
© 2016 IEEE.
PY - 2017/4/6
Y1 - 2017/4/6
N2 - Following the decision to choose Rijndael as the successor of Data Encryption Standard (DES), Advanced Encryption Standard (AES) was increasingly used in numerous applications which require confidentiality and the secure exchange of the data. While security is a property increasingly sought for many applications (credit cards, telecommunications...), it becomes necessary to consider physical attacks as a source of faults. For example, fault attacks are used to change the behavior of a system and recover meaningful data remain secret. This technique is called Differential Fault Analysis (DFA). To protect the AES algorithm against attacks by fault injection, several fault detection schemes were proposed, which is based on information, hardware or temporal redundancy. In this paper, we implemented the AES algorithm in the encryption process. Also, we proposed a reliable fault detection scheme for the AES algorithm. Our simulations show that the fault coverage of the proposed scheme for single and multiple random errors achieves 99.998%. Moreover, the fault coverage, area overhead, throughput and frequency degradation of our modified AES architecture are also compared to those of the previously reported fault detection schemes.
AB - Following the decision to choose Rijndael as the successor of Data Encryption Standard (DES), Advanced Encryption Standard (AES) was increasingly used in numerous applications which require confidentiality and the secure exchange of the data. While security is a property increasingly sought for many applications (credit cards, telecommunications...), it becomes necessary to consider physical attacks as a source of faults. For example, fault attacks are used to change the behavior of a system and recover meaningful data remain secret. This technique is called Differential Fault Analysis (DFA). To protect the AES algorithm against attacks by fault injection, several fault detection schemes were proposed, which is based on information, hardware or temporal redundancy. In this paper, we implemented the AES algorithm in the encryption process. Also, we proposed a reliable fault detection scheme for the AES algorithm. Our simulations show that the fault coverage of the proposed scheme for single and multiple random errors achieves 99.998%. Moreover, the fault coverage, area overhead, throughput and frequency degradation of our modified AES architecture are also compared to those of the previously reported fault detection schemes.
KW - AES
KW - Fault detection
KW - FPGA
KW - Hardware Implementation
UR - http://www.scopus.com/inward/record.url?scp=85018413661&partnerID=8YFLogxK
U2 - 10.1109/ISIVC.2016.7893960
DO - 10.1109/ISIVC.2016.7893960
M3 - Conference contribution
AN - SCOPUS:85018413661
T3 - 2016 International Symposium on Signal, Image, Video and Communications, ISIVC 2016
SP - 47
EP - 52
BT - 2016 International Symposium on Signal, Image, Video and Communications, ISIVC 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2016 International Symposium on Signal, Image, Video and Communications, ISIVC 2016
Y2 - 21 November 2016 through 23 November 2016
ER -