A low flicker noise direct conversion receiver for the IEEE 802.11a wireless LAN standard

M. A. Abdelghany; A. I.A. Galal; R. K. Pokharel; H. Kanaya; KYoshida

doi:10.1109/APMC.2009.5384336

A low flicker noise direct conversion receiver for the IEEE 802.11a wireless LAN standard

M. A. Abdelghany, A. I.A. Galal, R. K. Pokharel, H. Kanaya, KYoshida

Kyushu University

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

9 Scopus citations

Abstract

In this paper, a low flicker noise, 5 GHz Direct Conversion Receiver (DRC) has been designed utilizing Dynamic Current Injection (DCI) and tuning inductor in the mixing stage. This DRC has been designed in a TSMC 0.18 μm 1P6M CMOS process for WLAN 802.11a applications. The proposed DRC achieves 7.4 dB SSB-NF, 28 dB Conversion Gain (CG), -10 dBm IIP3, and 1/f noise corner frequency of 100KHz with 80mW power consumption from 1.8V supply voltage. The active chip area was 1.9mm². All the simulations has been performed by Cadence Spectre® simulator.

Original language	English
Title of host publication	APMC 2009 - Asia Pacific Microwave Conference 2009
Pages	1647-1650
Number of pages	4
DOIs	https://doi.org/10.1109/APMC.2009.5384336
State	Published - 2009
Externally published	Yes
Event	Asia Pacific Microwave Conference 2009, APMC 2009 - Singapore, Singapore Duration: 7 Dec 2009 → 10 Dec 2009

Publication series

Name	APMC 2009 - Asia Pacific Microwave Conference 2009

Conference

Conference	Asia Pacific Microwave Conference 2009, APMC 2009
Country/Territory	Singapore
City	Singapore
Period	7/12/09 → 10/12/09

Keywords

CMOS analog integrated circuits
Direct conversion receiver
Flicker-noise
Front-end receiver
IEEE 802.11a

Access to Document

10.1109/APMC.2009.5384336

Cite this

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title = "A low flicker noise direct conversion receiver for the IEEE 802.11a wireless LAN standard",

abstract = "In this paper, a low flicker noise, 5 GHz Direct Conversion Receiver (DRC) has been designed utilizing Dynamic Current Injection (DCI) and tuning inductor in the mixing stage. This DRC has been designed in a TSMC 0.18 μm 1P6M CMOS process for WLAN 802.11a applications. The proposed DRC achieves 7.4 dB SSB-NF, 28 dB Conversion Gain (CG), -10 dBm IIP3, and 1/f noise corner frequency of 100KHz with 80mW power consumption from 1.8V supply voltage. The active chip area was 1.9mm2. All the simulations has been performed by Cadence Spectre{\textregistered} simulator.",

keywords = "CMOS analog integrated circuits, Direct conversion receiver, Flicker-noise, Front-end receiver, IEEE 802.11a",

author = "Abdelghany, \{M. A.\} and Galal, \{A. I.A.\} and Pokharel, \{R. K.\} and H. Kanaya and KYoshida",

year = "2009",

doi = "10.1109/APMC.2009.5384336",

language = "English",

isbn = "9781424428021",

series = "APMC 2009 - Asia Pacific Microwave Conference 2009",

pages = "1647--1650",

booktitle = "APMC 2009 - Asia Pacific Microwave Conference 2009",

note = "Asia Pacific Microwave Conference 2009, APMC 2009 ; Conference date: 07-12-2009 Through 10-12-2009",

}

Abdelghany, MA, Galal, AIA, Pokharel, RK, Kanaya, H & KYoshida 2009, A low flicker noise direct conversion receiver for the IEEE 802.11a wireless LAN standard. in APMC 2009 - Asia Pacific Microwave Conference 2009., 5384336, APMC 2009 - Asia Pacific Microwave Conference 2009, pp. 1647-1650, Asia Pacific Microwave Conference 2009, APMC 2009, Singapore, Singapore, 7/12/09. https://doi.org/10.1109/APMC.2009.5384336

A low flicker noise direct conversion receiver for the IEEE 802.11a wireless LAN standard. / Abdelghany, M. A.; Galal, A. I.A.; Pokharel, R. K. et al.
APMC 2009 - Asia Pacific Microwave Conference 2009. 2009. p. 1647-1650 5384336 (APMC 2009 - Asia Pacific Microwave Conference 2009).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AU - Abdelghany, M. A.

AU - Galal, A. I.A.

AU - Pokharel, R. K.

AU - Kanaya, H.

AU - KYoshida,

PY - 2009

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AB - In this paper, a low flicker noise, 5 GHz Direct Conversion Receiver (DRC) has been designed utilizing Dynamic Current Injection (DCI) and tuning inductor in the mixing stage. This DRC has been designed in a TSMC 0.18 μm 1P6M CMOS process for WLAN 802.11a applications. The proposed DRC achieves 7.4 dB SSB-NF, 28 dB Conversion Gain (CG), -10 dBm IIP3, and 1/f noise corner frequency of 100KHz with 80mW power consumption from 1.8V supply voltage. The active chip area was 1.9mm2. All the simulations has been performed by Cadence Spectre® simulator.

KW - CMOS analog integrated circuits

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KW - Flicker-noise

KW - Front-end receiver

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A low flicker noise direct conversion receiver for the IEEE 802.11a wireless LAN standard

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Keywords

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