A Fault Detection AES Scheme for Resource-Constrained Embedded Systems

Noura Benhadjyoussef, Mouna Karmani, Hassen Mestiri

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Scopus citations

Abstract

The fault injection attack is an effective cryptanalysis technique against symmetric and asymmetric encryption algorithms., several countermeasures that detect errors in processing have been proposed in order to protect the Advanced Encryption Standard (AES) against Differential fault analysis (DFA). In this paper, a parity error-detection scheme has been presented in order to secure AES 32-bits embedded systems with resource constraints. This scheme is based on parity comparison between the correct parity of the round output and the predicted parity according to the processing steps of the AES round. The proposed AES hardware scheme was designed and synthesized using the Xilinx Virtex-5 FPGA. The experimental results show that the area overhead and the decreasing time are about 2.5% and 22% respectively. The proposed countermeasure achieves high fault coverage reaching 93 %.

Original languageEnglish
Title of host publicationProceedings of International Conference on Advanced Systems and Emergent Technologies, IC_ASET 2019
EditorsAbdessattar Ben Amor, Salwa Elloumi, Walid Amri, Khaled Nouri, Naoufel Machta
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages160-165
Number of pages6
ISBN (Electronic)9781728113173
DOIs
StatePublished - Mar 2019
Externally publishedYes
Event3rd International Conference on Advanced Systems and Emergent Technologies, IC_ASET 2019 - Hammamet, Tunisia
Duration: 19 Mar 201922 Mar 2019

Publication series

NameProceedings of International Conference on Advanced Systems and Emergent Technologies, IC_ASET 2019

Conference

Conference3rd International Conference on Advanced Systems and Emergent Technologies, IC_ASET 2019
Country/TerritoryTunisia
CityHammamet
Period19/03/1922/03/19

Keywords

  • 32-bit embedded systems
  • AES
  • DFA countermeasures
  • FPGA implementation

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